Selecting the proper method for connecting semiconductor dies to a printed circuit board (PCB) is an important design consideration which may affect the reliability and scalability of the final PCB. One method, that is currently used heavily, is stud bump bonding (SBB). The process of forming SBB is conceptually simple and consists of few steps: forming a free air ball, bonding the ball to the bond pads of the die, and tearing off the wire to provide a free tail bump. The ball (or bump), which is on the bond pad, is then brought in contact with the PCB, such that an electrical connection is formed by either adhesive or ultrasonic connection. The advantage of SBB is that it does not require under-bump metallization, and thus does not require wafer processing.
In SBB, the tip of the bond wire (generally gold) is melted to form a ball at the end of a wire bonding assembly. The tip of this assembly is brought close to the bond pad such that the ball is in contact with the bond pad, and by applying this mechanical force, in addition to heat and ultrasonic energy, the ball creates a metallic connection to the bond pad. The wire bonding assembly tool finishes by breaking off the bond wire to begin another cycle. Current assemblies can make more than 12 of these bumps per second. These bumps may then be used later to bond the die with the PCB using adhesive or ultrasonic methods.
When the die contains many of these bumps, the connection to the PCB may be very durable because the die is connected to the PCB in several spots. In other words, the amount of force required to dislodge the die from the PCB would likely increase with the increase in connection points. However, when the die contains few connection points then the die may not have a durable connection to the PCB.
It is also possible that, given certain design considerations, the die may need to be elevated from the surface of the PCB. This may be desirable as a means to more efficiently evacuate heat from the PCB, or when space requires that other electrical vias travel below the die. Unfortunately, elevating the die from the surface of the PCB using conventional techniques may result in a connection that suffers from low shear strength; thus is not durable or reliable.
The common assignee of this application and application Ser. No. 11/226,568, from which priority is claimed, also uses bumps in the probe testing of semiconductors. Specifically, commonly owned application Ser. No. 11/226,568 describes a laterally compliant spring-based interposer 1105 (see FIG. 12) for testing semiconductors that imparts minimal vertical force on a probe contactor substrate 1110 while the interposer is engaged. Often the probe contactor substrate is the semiconductor to be tested. The interposer 1105 may be connected to testing equipment needed to test the probe contactor substrate 1110. Referring to callout figure in FIG. 12, the lateral interposer 1105 applies lateral force in the direction of the arrow 1115, causing the interposer substrate 1120 to move in the direction of the lateral force, urging the lateral spring contactor 1125 to come in contact with the probe contactors 1130 and 1135. This results in an electrical connection between the probe contactor substrate 1110 and the interposer 1105 (which, in some embodiments, would necessarily electrically connect the testing equipment to the semiconductor) so that probe testing can be performed.
In this application, the probe contactor substrate 1110 to be tested should have probe contactors 1130 and 1135 which extend from the plane of the probe contactor substrate 1110 such that the lateral interposer 1105 can engage the probe contactors 1130 and 1135 and perfect an electrical connection with the probe contactors 1130 and 1135 (and thus with the semiconductor). One such probe contactor that may be used is a bump applied by SBB; however, current SBB techniques yield a single bump that may be too short to fully engage the lateral interposer 1105, or yield a column of bumps that is too weak, rendering testing difficult, if not impossible.
To extend the length of the bumps, N. Ishikawa of Fujitsu Ltd. has made a tower of 17 gold stud bumps (See FIG. 15). Ishikawa has also formed several individual multi-bump towers (See FIG. 16). These structures, however, have very little lateral strength because they contain a footprint of only one bump; thus in bonding a die to a PCB with such a structure, the connection would not be durable or reliable. Similarly, the tall structure could not survive the lateral stress exerted by the lateral interposer used in semiconductor testing.
Therefore, a need exists for the contact bumps to have high lateral and vertical strength. A need further exists for the bumps to be built up, resulting in additional height without sacrificing strength.